Paralleled hardware annealing of cellular neural networks for optimal solutions

Author

Bang, Sa H. ; Sheu, Bing J. ; Wu, Tony H Y

Author_Institution

Dept. of Electr. Eng., Univ. of Southern California, Los Angeles, CA, USA

Volume

4

fYear

1994

fDate

27 Jun-2 Jul 1994

Firstpage

2046

Abstract

Hardware annealing, which is a paralleled version of mean-field annealing in analog networks, is an efficient method of finding the optimal solutions for cellular neural networks. It does not require any stochastic procedure and hence can be very fast. Once the energy of the network is increased, the hardware annealing searches for the globally minimum energy state by gradually increasing the gain of neurons. In typical non-optimization problems, it also provides enough energy to frozen neurons caused by ill-conditioned initial states

Keywords

Jacobian matrices; Lyapunov matrix equations; Toeplitz matrices; cellular neural nets; neural nets; cellular neural networks; globally minimum energy state; ill-conditioned initial states; nonoptimization problems; optimal solutions; paralleled hardware annealing; Cellular neural networks; Computational modeling; Energy states; Image processing; Neural network hardware; Neurons; Nonlinear dynamical systems; Signal processing; Simulated annealing; Stochastic processes;

fLanguage

English

Publisher

ieee

Conference_Titel

Neural Networks, 1994. IEEE World Congress on Computational Intelligence., 1994 IEEE International Conference on

Conference_Location

Orlando, FL

Print_ISBN

0-7803-1901-X

Type

conf

DOI

10.1109/ICNN.1994.374528

Filename

374528