Title :
HAVENN: horizontally and vertically expandable neural networks
Author :
Lo, Jien-Chung ; Fischer, G.
Author_Institution :
Dept. of Electr. Eng., Rhode Island Univ., Kingston, RI, USA
fDate :
27 Jun-2 Jul 1994
Abstract :
The toughest challenge facing hardware designers of artificial neural networks is the expandability problem, since no single VLSI chip is likely to accommodate all components of a real world application. In this paper, the authors present a microelectronic system architecture with virtually unlimited expandability at a relatively low cost in additional hardware and reduced system performance. The horizontally and vertically expandable neural network (HAVENN) architecture consists of three types of chips: a single layer neural network chip, a summer chip and a repeater chip. The most important features of the proposed architecture are: a balanced distribution of(circuit) complexity between board level and chip level, easy implementation, true parallel operation and versatility
Keywords :
VLSI; neural chips; neural net architecture; HAVENN; board level; chip level; horizontally and vertically expandable neural networks; microelectronic system architecture; parallel operation; repeater chip; single layer neural network chip; summer chip; Adders; Artificial neural networks; Circuits; Microelectronics; Neural network hardware; Neural networks; Neurons; Problem-solving; Repeaters; Very large scale integration;
Conference_Titel :
Neural Networks, 1994. IEEE World Congress on Computational Intelligence., 1994 IEEE International Conference on
Conference_Location :
Orlando, FL
Print_ISBN :
0-7803-1901-X
DOI :
10.1109/ICNN.1994.374533