DocumentCode :
2886328
Title :
Formal design of RNS processors
Author :
Elleithy, Khaled M. ; Bayoumi, Magdy A.
Author_Institution :
Dept. of Comput. Eng., King Fahd Univ. of Pet. & Miner., Dhahran, Saudi Arabia
fYear :
1991
fDate :
16-17 Jun 1991
Firstpage :
605
Abstract :
A formal design methodology is used to design a residue Number System (RNS) processor. An optimal architecture for the residue decoding process is obtained through this design approach. The architecture is modular, consists of simple cells, and is general for any set of moduli
Keywords :
digital arithmetic; number theory; parallel architectures; RNS processors; formal design; modular architecture; optimal architecture; residue Number System; residue decoding process; Computer architecture; Decoding; Design methodology; Logic programming; Minerals; Parallel architectures; Petroleum; Process design; Specification languages; User interfaces;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1991. Conference Proceedings, China., 1991 International Conference on
Conference_Location :
Shenzhen
Type :
conf
DOI :
10.1109/CICCAS.1991.184429
Filename :
184429
Link To Document :
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