Title :
Hardware implementation of ART1 memories using a mixed analog/digital approach
Author :
Ho, C.S. ; Liou, J.J. ; Georgiopoulos, M.
Author_Institution :
Dept. of Electr. & Comput. Eng., Central Florida Univ., Orlando, FL, USA
fDate :
27 Jun-2 Jul 1994
Abstract :
This paper presents a VLSI circuit implementation for both the short-term memory (STM) and long-term memory (LTM) of the adaptive resonance theory neural network (ART1-NN). The circuit is implemented based on the transconductance-mode approach and mixed analog/digital components, in which analog circuits are used to fully incorporate the parallel mechanism of the neural network, whereas digital circuits provide a reduced circuit size as well as a more precise multiplication operation. A simple analog-to-digital (A/D) converter is also included to realize binary STM activities and characterize the quenching threshold. The PSpice simulation results of the implemented circuits are in good agreement with the exact solutions of the coupled nonlinear differential equations
Keywords :
ART neural nets; MOS memory circuits; SPICE; VLSI; analogue storage; analogue-digital conversion; content-addressable storage; mixed analogue-digital integrated circuits; neural chips; A/D converter; ART1 memories; ART1-NN; PSpice simulation; VLSI circuit implementation; adaptive resonance theory neural network; analog circuits; coupled nonlinear differential equations; digital circuits; long-term memory; mixed analog/digital approach; quenching threshold; short-term memory; transconductance-mode approach; Analog circuits; Analog-digital conversion; Circuit simulation; Coupling circuits; Digital circuits; Hardware; Neural networks; RLC circuits; Resonance; Very large scale integration;
Conference_Titel :
Neural Networks, 1994. IEEE World Congress on Computational Intelligence., 1994 IEEE International Conference on
Conference_Location :
Orlando, FL
Print_ISBN :
0-7803-1901-X
DOI :
10.1109/ICNN.1994.374546
