A novel ultra-high speed signal capture based on a single FPGA chip

A novel ultra-high speed signal capturer based-on a single FPGA chip has been proposed. The slow delta-sigma D/A algorithm limits the conversion speed of all digital-type A/D converter. The proposed multi-pass method is used to enhance the apparent conversion rate despite of the relatively low real-time sampling rate of the original A/D converter. Except a simple RC average circuit for delta-sigma D/A conversion and a comparator with sampling/hold for A/D conversion, the whole system is built in a single FPGA chip, of which functions includes the DDS-type AWG, delta-sigma D/A converter, SAR A/D converter, TDC module, ADPLL module, DLL phase/time shifter, and data memory controller.