DocumentCode :
2886995
Title :
Monolithic 3.3 V CCD/SOI-CMOS imager technology
Author :
Suntharalingam, V. ; Burke, B. ; Cooper, M. ; Yost, D. ; Gouker, P. ; Anthony, M. ; Whittingham, H. ; Sage, J. ; Burns, J. ; Rabe, S. ; Chen, C. ; Knecht, J. ; Cann, S. ; Wyatt, P. ; Keast, C.
Author_Institution :
Lincoln Lab., MIT, Lexington, MA, USA
fYear :
2000
fDate :
10-13 Dec. 2000
Firstpage :
697
Lastpage :
700
Abstract :
We have developed a merged CCD/SOI-CMOS technology that enables the fabrication of monolithic, low-power imaging systems on a chip. The CCD´s, fabricated in the bulk handle wafer, have charge-transfer inefficiencies of about 1/spl times/10/sup -5/ and well capacities of more than 100,000 electrons with 3.3-V clocks and 8/spl times/8-/spl mu/m pixels. Fully depleted 0.35-/spl mu/m SOI-CMOS ring oscillators have stage delay of 48 ps at 3.3 V. We demonstrate for the first time an integrated image sensor with charge-domain A/D conversion and on-chip clocking.
Keywords :
CCD image sensors; CMOS image sensors; analogue-digital conversion; low-power electronics; silicon-on-insulator; 0.35 micron; 3.3 V; A/D conversion; charge transfer efficiency; delay; fully depleted SOI-CMOS ring oscillator; integrated image sensor; monolithic low-power CCD imager; on-chip clocking; CMOS image sensors; CMOS technology; Charge coupled devices; Circuits; Clocks; Crosstalk; Fabrication; Image sensors; Optical imaging; Optical noise;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 2000. IEDM '00. Technical Digest. International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-6438-4
Type :
conf
DOI :
10.1109/IEDM.2000.904414
Filename :
904414
Link To Document :
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