DocumentCode

2887672

Title

A 34ns 1Mb CMOS SRAM using triple poly

Author

Wada, T. ; Hirose, T. ; Shinohara, H. ; Kawai, Y. ; Yuzuriha, K. ; Kohno, Y. ; Kayano, S.

Author_Institution

Mitsubishi LSI Research and Development Laboratory, Itami, Japan

Volume

XXX

fYear

1987

fDate

0-0 Feb. 1987

Firstpage

262

Lastpage

263

Keywords

Artificial intelligence; CMOS process; MOS devices; Random access memory; Read-write memory;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference. Digest of Technical Papers. 1987 IEEE International

Conference_Location

New York, NY, USA

Type

conf

DOI

10.1109/ISSCC.1987.1157108

Filename

1157108