DocumentCode :
2887812
Title :
A CMOS-CCD signal processor for skew compensation
Author :
Miura, H. ; Masuda, I. ; Sato, M.
Author_Institution :
Sony Semiconductor, Consumer Video Groups, Kanagawa, Japan
Volume :
XXX
fYear :
1987
fDate :
0-0 Feb. 1987
Firstpage :
112
Lastpage :
113
Abstract :
This paper will cover a CMOS-CCD signal processor with 100mW power consumption for skew compensation in video recorders. Device has three CCD registers merged into one common output circuit, a timing generator, clock drivers, sample and hold and skew detector.
Keywords :
Capacitance; Charge coupled devices; Circuits; Delay lines; Registers; Signal processing; Switches; Timing; Voltage; Voltage-controlled oscillators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1987 IEEE International
Conference_Location :
New York, NY, USA
Type :
conf
DOI :
10.1109/ISSCC.1987.1157116
Filename :
1157116
Link To Document :
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