DocumentCode
2887902
Title
A 300MHz bipolar-CMOS video shift register with FIFO
Author
Pak-Ho Yeung ; Shergill, R. ; Ta-Ming Wang ; Tucci, P.
Author_Institution
National Semiconductor, Santa Clara, CA
Volume
XXX
fYear
1987
fDate
0-0 Feb. 1987
Firstpage
56
Lastpage
57
Abstract
A 16b video register containing a 4W ×16b FIFO, fabricated in a bipolar CMOS process will be described. The chip (19,500 sq mil) attains a serial data rate of 300MHz and a parallel date rate of 20MHz with a supply current of 130mA.
Keywords
Bipolar transistors; CMOS technology; Circuits; Delay; Energy consumption; MOSFETs; Power supplies; Shift registers; Switches; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference. Digest of Technical Papers. 1987 IEEE International
Conference_Location
New York, NY, USA
Type
conf
DOI
10.1109/ISSCC.1987.1157121
Filename
1157121
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