DocumentCode
2887998
Title
A 1GHz 6b ADC system
Author
Corcoran, Jennifer ; Poulton, K. ; Hornak, T.
Author_Institution
Hewlett-Packard Laboratories, Palo Alto, CA, USA
Volume
XXX
fYear
1987
fDate
0-0 Feb. 1987
Firstpage
102
Lastpage
103
Abstract
A two-rank GaAs sample and hold chip and four 250MHz ADCs developed to form a 1GHz 6b ADC system will be discussed. The two rank architecture avoids dynamic errors inherent to interleaved ADCs: accuracy exceeds 5.2 effective bits up to 1GHz input frequency.
Keywords
Bridge circuits; Capacitors; Clocks; Diodes; FETs; Filters; Frequency; Gallium arsenide; MESFETs; Smoothing methods;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference. Digest of Technical Papers. 1987 IEEE International
Conference_Location
New York, NY, USA
Type
conf
DOI
10.1109/ISSCC.1987.1157126
Filename
1157126
Link To Document