• DocumentCode
    2888032
  • Title

    A 32b full custom CPU

  • Author

    Hinata, J. ; Ohtsuka, A. ; Kaneko, Kunihiko ; Korematsu, J. ; Nishida, Keisuke ; Shimoyama, H. ; Tomisawa ; Nishiwaki, Y. ; Kimura, Hiromitsu

  • Author_Institution
    Mitsubishi LSI Research and Development Laboratory, Itami, Japan
  • Volume
    XXX
  • fYear
    1987
  • fDate
    0-0 Feb. 1987
  • Firstpage
    84
  • Lastpage
    85
  • Abstract
    A two-chip 32b VLSI CPU chip set with a cycle time of less than 200ns, using a 1.3μm double-level metal process will be reported. Chip contains 242K transistors sized at 8.75×11.26mm for an average density of 0.65 square mils per transistor.
  • Keywords
    CMOS logic circuits; Central Processing Unit; Circuit simulation; Circuit testing; Computational modeling; Design automation; Logic circuits; Logic design; Read-write memory; Wiring;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference. Digest of Technical Papers. 1987 IEEE International
  • Conference_Location
    New York, NY, USA
  • Type

    conf

  • DOI
    10.1109/ISSCC.1987.1157129
  • Filename
    1157129
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2888032