Title :
A realtime microprogrammable video signal LSI
Author :
Yamashina, M. ; Enomoto, Tetsuya ; Kunio, T. ; Tamitani, I. ; Harasaki, H. ; Nishitani, Takashi ; Sato, Mitsuhisa ; Kikuchi, Kazuro
Author_Institution :
NEC Microelectronics Research Laboratories, Kawasaki, Japan
Abstract :
A signal processor employing a 3-stage pipelined architecture for efficient realtime video operations, such as edge filtering, motion picture coding and motion compensation, will be reported. Chip incorporates a peak value detector allowing high-speed vector quantization and pattern matching operation. The chip (94.5mm2) uses a 2.5μ CMOS double layer metal process and operates at 14.3MHz.
Keywords :
Circuits; Laboratories; Large scale integration; National electric code; Pattern matching; Random access memory; Read only memory; Signal design; Signal processing; Video signal processing;
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1987 IEEE International
Conference_Location :
New York, NY, USA
DOI :
10.1109/ISSCC.1987.1157138
