DocumentCode :
2888614
Title :
Circuit technologies for 16Mb DRAMs
Author :
Mano, Toru ; Matsumura, Takeshi ; Yamada, J. ; Inoue, Junichi ; Nakajima, Shigeru ; Minegishi, K. ; Miura, Kiyotaka ; Matsuda, Tadamitsu ; Hashimoto, C. ; Namatsu, H.
Author_Institution :
NTT Electrical Communications Laboratories, Atsugi, Kanagawa, Japan
Volume :
XXX
fYear :
1987
fDate :
0-0 Feb. 1987
Firstpage :
22
Lastpage :
23
Keywords :
CMOS process; CMOS technology; Capacitance; Circuit testing; DRAM chips; Error correction codes; Flip-flops; Low voltage; Random access memory; Threshold voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1987 IEEE International
Conference_Location :
New York, NY, USA
Type :
conf
DOI :
10.1109/ISSCC.1987.1157158
Filename :
1157158
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=2888614
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