DocumentCode
2888724
Title
A practical approach to synchronous hardware verification
Author
Gopalakrishnan, Ganesh ; Jain, Prabhat
Author_Institution
Dept. of Comput. Sci., Utah Univ., Salt Lake City, UT, USA
fYear
1991
fDate
4-8 Jan 1991
Firstpage
180
Lastpage
186
Abstract
Hardware designs expressed in a simple hardware description language can be formally verified by adapting techniques developed for software verification. This paper presents a case study that supports this claim. From the structural specification of a two-phase clocked synchronous hardware design, a behavioral description is automatically inferred. This is subject to algebraic simplification using rewrite rules. Some of the simplification steps are achieved by discovering a loop invariant associated with a loop in the control flow graph. Once simplified, a homomorphism is exhibited from the implementation algebra to the specification algebra, to complete the proof
Keywords
VLSI; circuit CAD; specification languages; algebraic simplification; behavioral description; control flow graph; hardware description language; homomorphism; implementation algebra; rewrite rules; specification algebra; structural specification; synchronous hardware verification; Algebra; Automatic control; Circuit simulation; Cities and towns; Clocks; Computer science; DSL; Flow graphs; Hardware design languages; Logic;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design, 1991. Proceedings., Fourth CSI/IEEE International Symposium on
Conference_Location
New Delhi
Print_ISBN
0-8186-2125-7
Type
conf
DOI
10.1109/ISVD.1991.185114
Filename
185114
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