Title :
Scan path testing of a multichip computer
Author :
Schuchard, R. ; Weiss, Daniel
Author_Institution :
Hewlett-Packard Co., Fort Collins, CO, USA
Abstract :
On-chip test support circuitry has been developed for a 32b multichip VLSI computer. The test support consists of a test PLA and a 45MHz diagnostic interface port that multiplexes up to 16 serial scan paths. While requiring less than 10% of chip area and power, it supports testing, characterization and diagnosis from chip to system level.
Keywords :
Circuit testing; Design for testability; Driver circuits; Electronics packaging; Hardware; MOS devices; Registers; Software testing; System testing; System-on-a-chip;
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1987 IEEE International
Conference_Location :
New York, NY, USA
DOI :
10.1109/ISSCC.1987.1157190
