An efficient VLSI CORDIC array structure implementation of Toeplitz eigensystem solvers

A novel, efficient implementation of the Toeplitz eigensystem solver using a doubly pipelined VLSI CORDIC array processor is presented. First, a backward CORDIC angle recoding scheme is proposed which is able to reduce the number of internal CORDIC iterations by at least 50%. It is shown how to apply this scheme to a family of feedforward algorithms for solving general linear systems, especially the Toeplitz systems. This leads to the implementation of a Toeplitz eigensystem solver with CORDIC-based array processors