DocumentCode
2889865
Title
Circuit performance variability reduction: principles, problems, and practical solutions
Author
Styblinski, M.A. ; Zhang, J.C.
Author_Institution
Dept. of Electr. Eng., Texas A&M Univ., College Station, TX, USA
fYear
1991
fDate
11-14 Nov. 1991
Firstpage
170
Lastpage
173
Abstract
The authors present several novel results in the area of variability minimization. They develop a variability gradient formula, give the theoretical conditions for variability minimization, and outline the principles and practical solutions of factor screening for variability. A multistage procedure is described for on-target design, based on variability gradient information, dynamic screening, performance variance minimization, and separate on-target tuning. This methodology was successfully applied to the variability minimization of a practical CMOS delay circuit, after several direct methods of on-target oriented methods failed.<>
Keywords
CMOS integrated circuits; delays; integrated circuit technology; quality control; CMOS delay circuit; factor screening; multistage procedure; on-target tuning; performance variability reduction; performance variance minimization; variability gradient formula; variability minimization; Circuit noise; Circuit optimization; Circuit synthesis; Degradation; Design methodology; Instruments; Manufacturing processes; Minimization methods; Size control; Working environment noise;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer-Aided Design, 1991. ICCAD-91. Digest of Technical Papers., 1991 IEEE International Conference on
Conference_Location
Santa Clara, CA, USA
Print_ISBN
0-8186-2157-5
Type
conf
DOI
10.1109/ICCAD.1991.185222
Filename
185222
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