Title :
Comparison of random test vector generation strategies
Author :
Debany, Warren H., Jr. ; Hartmann, Carlos R P ; Varshney, Pramod K. ; Mehrotra, Kishan G.
Author_Institution :
Rome Lab., Griffiss AFB, NY, USA
Abstract :
Four random test generation strategies are compared to determine their relative effectiveness: equiprobable 0s and 1s; two weighted random pattern generation algorithms; and the maximum output information entropy principle. The test generation strategies are compared at a variety of target fault coverages. Two statistically based metrics are used to evaluate the techniques: a large-sample test of the difference of means and an upper confidence limit. The two weighted random test pattern generation strategies are found to be generally superior to equiprobable 0s and 1s and maximum output entropy. For a given logic circuit, the same technique is not necessarily optimal at every fault coverage.<>
Keywords :
VLSI; built-in self test; entropy; logic testing; 54LS181; fault coverages; maximum output information entropy principle; random test vector generation strategies; test pattern generation strategies; upper confidence limit; Circuit faults; Circuit testing; Electrical fault detection; Entropy; Fault detection; Laboratories; Logic circuits; Logic testing; Probability; Test pattern generators;
Conference_Titel :
Computer-Aided Design, 1991. ICCAD-91. Digest of Technical Papers., 1991 IEEE International Conference on
Conference_Location :
Santa Clara, CA, USA
Print_ISBN :
0-8186-2157-5
DOI :
10.1109/ICCAD.1991.185243
