Title :
SADE: a graphical tool for VHDL-based system analysis
Author :
Lahti, J. ; Sipola, M. ; Kivela, J.
Author_Institution :
Dept. of Electr. Eng., Oulu Univ., Finland
Abstract :
A graphical tool for system analysis called SADE (System´s Analyst´s Design Environment) is described. The tool can generate behavioral VHDL (VHSIC Hardware Description Language) models from graphical, structured analysis diagrams. The models can be simulated on a standard VHDL simulator. The simulation results can be viewed animated in the graphical diagrams. The tool provides the designer with features found in sophisticated CASE tools, which make the construction of a system model and the analysis of simulation results easy.<>
Keywords :
circuit CAD; circuit analysis computing; graphical user interfaces; systems analysis; SADE; System´s Analyst´s Design Environment; VHDL-based system analysis; VHSIC Hardware Description Language; behavioral VHDL; graphical diagrams; graphical tool; structured analysis diagrams; system analysis; Analytical models; Animation; Buffer storage; Circuit simulation; Computational modeling; Computer aided software engineering; Integrated circuit modeling; Laboratories; Petri nets; Very high speed integrated circuits;
Conference_Titel :
Computer-Aided Design, 1991. ICCAD-91. Digest of Technical Papers., 1991 IEEE International Conference on
Conference_Location :
Santa Clara, CA, USA
Print_ISBN :
0-8186-2157-5
DOI :
10.1109/ICCAD.1991.185248
