DocumentCode
2890852
Title
A BIST scheme for testing and repair of multi-mode power switches
Author
Zhang, Zhaobo ; Kavousianos, Xrysovalantis ; Tsiatouhas, Yiorgos ; Chakrabarty, Krishnendu
Author_Institution
Dept. Electr. & Comput. Eng., Duke Univ., Durham, NC, USA
fYear
2011
fDate
13-15 July 2011
Firstpage
115
Lastpage
120
Abstract
It was shown recently that signature analysis can be used for the test, diagnosis and repair of a robust multi-mode power-gating architecture. A drawback of this approach is that it requires a tester in a production-test environment, and potentially expensive manufacturing steps are necessary to repair defective power switches. We propose a built-in self-test (BIST) and built-in-self-repair (BISR) scheme for test and repair of multi-mode power switches. The proposed method reduces test cost and obviates additional manufacturing steps for post-silicon repair. In addition to eliminating the need for an external tester, it offers protection against latent defects that are manifested as errors in the field. In this way, the robust BIST/BISR solution for power switches enhances the reliability of multi-core chips that employ aggressive power management techniques. Simulation results highlight the low hardware overhead and effectiveness of the proposed method for detecting, diagnosing and repairing defects.
Keywords
built-in self test; power semiconductor switches; BISR scheme; BIST scheme; built-in self-test; built-in-self-repair scheme; multicore chips; multimode power switches; power management techniques; production-test environment; robust multimode power-gating architecture; Built-in self-test; Clocks; Maintenance engineering; Radiation detectors; Transistors; Voltage-controlled oscillators;
fLanguage
English
Publisher
ieee
Conference_Titel
On-Line Testing Symposium (IOLTS), 2011 IEEE 17th International
Conference_Location
Athens
Print_ISBN
978-1-4577-1053-7
Type
conf
DOI
10.1109/IOLTS.2011.5993821
Filename
5993821
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