Title :
Increasing fault coverage for synchronous sequential circuits by the multiple observation time test strategy
Author :
Pomeranz, I. ; Reddy, S.M. ; Reddy, L.N.
Author_Institution :
Dept. of Electr. & Comput. Eng., Iowa Univ., Iowa City, IA, USA
Abstract :
The authors consider the problem of test generation for synchronous sequential circuits for the case where no hardware reset is available, and show that initialization is not a necessary requirement for a practical test generator. They present a test generation procedure for gate-level circuits which is based on multiple observation time units and multiple fault-free sequences, and they show that test sequences can be found by this procedure in cases where conventional test generators fail to find tests due to their failure to initialize the circuit. Experimental results for ISCAS-89 benchmark circuits are presented to support the claim that fault coverage can be significantly increased, while requiring small numbers of observation times and small numbers of fault-free responses.<>
Keywords :
automatic testing; fault location; logic testing; sequential circuits; ISCAS-89 benchmark circuits; fault coverage; gate-level circuits; multiple fault-free sequences; multiple observation time test strategy; synchronous sequential circuits; test generation procedure; Circuit faults; Circuit testing; Cities and towns; Clocks; Electrical fault detection; Fault detection; Hardware; Sequential analysis; Sequential circuits; Synchronous generators;
Conference_Titel :
Computer-Aided Design, 1991. ICCAD-91. Digest of Technical Papers., 1991 IEEE International Conference on
Conference_Location :
Santa Clara, CA, USA
Print_ISBN :
0-8186-2157-5
DOI :
10.1109/ICCAD.1991.185302