Control-flow error recovery using commodity multi-core architecture features

Author

Khoshavi, Navid ; Zarandi, Hamid R. ; Maghsoudloo, Mohammad

Author_Institution

Dept. of Comput. Eng. & Inf. Technol., Amirkabir Univ. of Technol., Tehran, Iran

fYear

2011

fDate

13-15 July 2011

Firstpage

190

Lastpage

191

Abstract

This paper presents a software-based technique to recover control-flow errors using inherent redundancy in commodity multi-core processors. The proposed recovery technique is composed of two phases of control-flow error detection and control-flow error recovery. Previous research shows that modern superscalar microprocessors already contain significant amounts of redundancy. CFEs can be tolerated by leveraging existing microprocessors redundancy. Therefore, the cost of adding extra redundancy for fault tolerance is eliminated.

Keywords

fault tolerant computing; microprocessor chips; multiprocessing systems; redundancy; system recovery; commodity multicore architecture; commodity multicore processor; control-flow error detection; control-flow error recovery; fault tolerance; microprocessor redundancy; software-based technique; superscalar microprocessor; Circuit faults; Microprocessors; Multicore processing; Redundancy; Testing; control-flow checking; control-flow error recovery; inherent redundancy; multi-core processor; on-line testing;

fLanguage

English

Publisher

ieee

Conference_Titel

On-Line Testing Symposium (IOLTS), 2011 IEEE 17th International

Conference_Location

Athens

Print_ISBN

978-1-4577-1053-7

Type

conf

DOI

10.1109/IOLTS.2011.5993838

Filename

5993838