DocumentCode
2891240
Title
Fault attack resistant deterministic random bit generator usable for key randomization
Author
Böhl, E. ; Duplys, P.
fYear
2011
fDate
13-15 July 2011
Firstpage
194
Lastpage
195
Abstract
Hardware as well as software implementations of cryptographic algorithms are susceptible to power analysis and fault attacks. We propose a power analysis-resistant and self-checking deterministic random bit generator. The proposed structure allows a concurrent code checking and an output suppression in the case of errors.
Keywords
cryptography; fault diagnosis; concurrent code checking; cryptographic algorithm; deterministic random bit generator; fault attack; hardware implementation; power analysis; self checking; software implementation; Adders; Circuit faults; Cryptography; Encoding; Generators; Rails; Testing; Fault attacks; constant weight code; fault injection; power analysis; side channel attacks;
fLanguage
English
Publisher
ieee
Conference_Titel
On-Line Testing Symposium (IOLTS), 2011 IEEE 17th International
Conference_Location
Athens
Print_ISBN
978-1-4577-1053-7
Type
conf
DOI
10.1109/IOLTS.2011.5993840
Filename
5993840
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