DocumentCode :
2891263
Title :
Minimizing channel density by shifting blocks and terminals
Author :
Cai, Y. ; Wong, D.F.
Author_Institution :
Dept. of Comput. Sci., Texas Univ., Austin, TX, USA
fYear :
1991
fDate :
11-14 Nov. 1991
Firstpage :
524
Lastpage :
527
Abstract :
The authors study the problem of minimizing channel density by shifting the blocks that form the sides of the channel and the terminals on the boundary of each block. Several special cases of this problem have been investigated, but no polynomial time algorithm was known for the general case. The authors present a polynomial time optimal algorithm for solving this problem. For long channels, they propose heuristic approaches to speed up the algorithm. Extensions as well as applications of the algorithm to detailed routing in building-block layout design are also discussed. Preliminary experimental results are very promising. Substantial reductions in routing area were obtained in moderate computation time.<>
Keywords :
VLSI; circuit layout CAD; VLSI; building-block layout design; heuristic approaches; minimizing channel density; polynomial time algorithm; Algorithm design and analysis; Circuits; Physics computing; Pins; Polynomials; Routing; Scholarships; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer-Aided Design, 1991. ICCAD-91. Digest of Technical Papers., 1991 IEEE International Conference on
Conference_Location :
Santa Clara, CA, USA
Print_ISBN :
0-8186-2157-5
Type :
conf
DOI :
10.1109/ICCAD.1991.185322
Filename :
185322
Link To Document :
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