DocumentCode
2891319
Title
Loopback output router for reliable Network on Chip
Author
Killian, C. ; Tanougast, C. ; Monteiro, F. ; Dandache, A.
Author_Institution
Lab. Interfaces, Sensors & Microelectron., Univ. of Paul Verlaine, Metz, France
fYear
2011
fDate
13-15 July 2011
Firstpage
206
Lastpage
207
Abstract
We present a new reliable high-performance interconnection approach destined for complex System on Chip based on the network-centric approach. The originality of our approach is to avoid the lost of data packets, detect routing errors and reduce data packets latency by emptying output buffer when the neighbour router is unavailable. We present the basic concepts of the reliability communication technique and FPGA implementations.
Keywords
field programmable gate arrays; network routing; network-on-chip; FPGA; high-performance interconnection approach; loopback output router; network on chip; network-centric approach; reliability communication technique; system on chip; Fault tolerance; Registers; Routing; System-on-a-chip; Table lookup; Network on Chip (NoC); data lost packets; online error detections; reliability;
fLanguage
English
Publisher
ieee
Conference_Titel
On-Line Testing Symposium (IOLTS), 2011 IEEE 17th International
Conference_Location
Athens
Print_ISBN
978-1-4577-1053-7
Type
conf
DOI
10.1109/IOLTS.2011.5993844
Filename
5993844
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