DocumentCode
2891370
Title
Design of high-resolution pipelined analog-to-digital converters using multiple-phase capacitor-splitting feedback interchange technique
Author
Chih-Haur Huang ; Soon-Jyh Chang ; Lee, Kuen-Jong
Author_Institution
Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan
Volume
2
fYear
2004
fDate
6-9 Dec. 2004
Firstpage
625
Abstract
A new technique, the multiple-phase capacitor-splitting feedback interchange (MP-CSFI) technique, is presented to reduce the harmonic distortion due to the capacitor mismatch for pipelined ADCs. The basic idea is to split the capacitors in the sub-DACs of a pipelined ADC and dynamically select the subsets of the split capacitors as the feedback ones during its operation such that the nonideal effects caused by the capacitors´ mismatches can be disturbed and modulated to a higher frequency band. A 12-bit, 35 MHz pipelined A/D converter with the proposed technique is designed and simulated using the TSMC 0.25 μm 1P5M technology to demonstrate the effectiveness of this technique.
Keywords
analogue-digital conversion; capacitors; circuit feedback; harmonic distortion; 0.25 micron; 12 bit; 35 MHz; TSMC 1P5M technology; capacitor mismatching; harmonic distortion; multiple phase capacitor splitting feedback interchange technique; pipelined ADC; pipelined analog-digital converters; Analog-digital conversion; Calibration; Capacitors; Circuits; Digital signal processing; Feedback; Frequency modulation; Harmonic distortion; Modems; Signal processing;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2004. Proceedings. The 2004 IEEE Asia-Pacific Conference on
Print_ISBN
0-7803-8660-4
Type
conf
DOI
10.1109/APCCAS.2004.1412955
Filename
1412955
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