A novel wavelet coefficients coding scheme and its FPGA realization

Author

Hwang, Yin-Tsung ; Cheng, Kuei-Hung ; Liang, Li-Chun ; Lin, Cheng-Chen

Author_Institution

Dept. of Electron. Eng., Nat. Yunlin Univ. of Sci. & Technol.

Volume

2

fYear

2004

fDate

6-9 Dec. 2004

Firstpage

665

Abstract

In this paper, a novel shape-adaptive zero tree coding scheme and its hardware realization are presented for the discrete wavelet transform based image compression. The proposed scheme employs a new scanning order and a new symbol set. It features shape adaptive processing, lower coding and memory complexities when compared with the well recognized SPIHT algorithm. The proposed coding scheme is also extended to the 3-D case to handle volumetric data including video sequence. Simulation results indicate that a 4 dB PSNR improvement can be obtained by shape adaptive processing. Its hardwired codec design consumes only 6 K logic gates and an FPGA realization can support a processing rate of 20 1024times1024 sized frames/sec

Keywords

adaptive codes; data compression; discrete wavelet transforms; field programmable gate arrays; image coding; logic gates; transform coding; tree codes; FPGA realization; PSNR; SPIHT algorithm; discrete wavelet transform; hardwired codec design; image compression; logic gates; shape adaptive processing; shape adaptive zero tree coding; video sequence; volumetric data handling; wavelet coefficients coding; Codecs; Discrete wavelet transforms; Field programmable gate arrays; Hardware; Image coding; Logic gates; PSNR; Shape; Video sequences; Wavelet coefficients;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2004. Proceedings. The 2004 IEEE Asia-Pacific Conference on

Conference_Location

Tainan

Print_ISBN

0-7803-8660-4

Type

conf

DOI

10.1109/APCCAS.2004.1412965

Filename

1412965