VLSI Implementation of a Lattice-Reduction Algorithm for Multi-Antenna Broadcast Precoding

This paper describes the first VLSI implementation of lattice reduction (LR) aided multi-antenna broadcast precoding with vector perturbation. The considered LR, scheme is based on Brun´s algorithm for finding integer relations. We analyze its high-level architectural issues, we devise a corresponding low-complexity implementation, and, finally, we develop a suitable VLSI architecture. The resulting circuit provides reference for the true silicon complexity of LR, for broadcast precoding with vector perturbation