Title :
High-speed and reduced-area RNS forward converter based on (2n -1, 2n, 2n +1) moduli set
Author :
Sheu, Ming-hwa ; Lin, Su-Hon ; Chen, Yung-Tai ; Chang, Yu-Chun
Keywords :
Acceleration; Adders; Arithmetic; Circuits; Costs; Delay; Digital signal processing; Hardware; Table lookup; Very large scale integration;
Conference_Titel :
Circuits and Systems, 2004. Proceedings. The 2004 IEEE Asia-Pacific Conference on
Print_ISBN :
0-7803-8660-4
DOI :
10.1109/APCCAS.2004.1413005
