Title :
Efficient VLSI architecture design for complex linear convolution using conjugate-polynomial-channel residue arithmetic system
Author :
Lin, Su-Hon ; Sheu, Ming-hwa ; Yang, Shyue-Wen
Keywords :
Arithmetic; Convolution; Degradation; Digital signal processing; Hardware; Heart; Libraries; Polynomials; Signal processing algorithms; Very large scale integration;
Conference_Titel :
Circuits and Systems, 2004. Proceedings. The 2004 IEEE Asia-Pacific Conference on
Print_ISBN :
0-7803-8660-4
DOI :
10.1109/APCCAS.2004.1413007
