DocumentCode :
2892523
Title :
Interleaved cyclic redundancy check (CRC) code
Author :
Kong, Jun Jin ; Parhi, Keshab K.
Author_Institution :
Dept. of Electr. & Comput. Eng., Minnesota Univ., Minneapolis, MN, USA
Volume :
2
fYear :
2003
fDate :
9-12 Nov. 2003
Firstpage :
2137
Abstract :
In this paper, we investigate interleaved cyclic redundancy check (CRC) code. The interleaved CRC can be obtained by merging independent small message blocks into one large block (merged interleaving) or by dividing the original message block into independent small sub blocks (divided interleaving) and then by alternatively dividing the resulting message block(s) using same generator polynomial. The interleaved CRC increases both the detection span and the detectable error patterns. New applications of the interleaved CRC as the error detection scheme or stopping criteria in interleaved error correction coding and iterative decoding schemes are proposed. Since each individual codeword of interleaved CRC code is mutually independent, it is possible to generate CRC in interleaved manner and to check CRC in parallel manner.
Keywords :
cyclic redundancy check codes; error correction codes; error detection codes; interleaved codes; iterative decoding; merging; CRC; detectable error pattern; error correction coding; error detection scheme; generator polynomial; interleaved cyclic redundancy check code; iterative decoding scheme; message block merging; Asynchronous transfer mode; Cyclic redundancy check; Cyclic redundancy check codes; Error correction codes; FDDI; Interleaved codes; Iterative decoding; Merging; Multiaccess communication; Polynomials;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signals, Systems and Computers, 2004. Conference Record of the Thirty-Seventh Asilomar Conference on
Print_ISBN :
0-7803-8104-1
Type :
conf
DOI :
10.1109/ACSSC.2003.1292358
Filename :
1292358
Link To Document :
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