• DocumentCode
    2893516
  • Title

    Multi-point model reductions of VLSI interconnects using the rational Arnoldi method with adaptive orders (RAMAO)

  • Author

    Lee, Herng-Jer ; Chu, Chia-Chi ; Feng, Wu-Shiung

  • Author_Institution
    Dept. of Electr. Eng., Chang Gung Univ., Taiwan
  • Volume
    2
  • fYear
    2004
  • fDate
    6-9 Dec. 2004
  • Firstpage
    1009
  • Abstract
    This work proposes the rational Arnoldi method with adaptive orders for high-speed VLSI interconnect reductions. It is based on an extension of the classical multi-point Pade approximation by using the rational Arnoldi iteration approach. Given a set of expansion points, the transfer function error at each expansion point is derived first. In each iteration of the proposed algorithm, the expansion frequency corresponding to the maximum output moment error is chosen. The corresponding reduced-order model yields the greatest output moment improvement.
  • Keywords
    VLSI; approximation theory; high-speed integrated circuits; integrated circuit interconnections; iterative methods; reduced order systems; transfer functions; adaptive orders; expansion frequency; high speed VLSI interconnects; maximum output moment error; multipoint Pad6 approximation; multipoint model reductions; rational Arnoldi iteration method; reduced order model; transfer function error; Circuit analysis; Circuit simulation; Clocks; Councils; Frequency synthesizers; LAN interconnection; RLC circuits; Reduced order systems; Very large scale integration; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2004. Proceedings. The 2004 IEEE Asia-Pacific Conference on
  • Print_ISBN
    0-7803-8660-4
  • Type

    conf

  • DOI
    10.1109/APCCAS.2004.1413052
  • Filename
    1413052