• DocumentCode
    2893529
  • Title

    A 28nm 0.6V low-power DSP for mobile applications

  • Author

    Gammie, Gordon ; Ickes, Nathan ; Sinangil, Mahmut E. ; Rithe, Rahul ; Gu, J. ; Wang, Alice ; Mair, Hugh ; Datla, Satyendra ; Rong, Bing ; Honnavara-Prasad, Sushma ; Ho, Lam ; Baldwin, Greg ; Buss, Dennis ; Chandrakasan, Anantha P. ; Ko, Uming

  • Author_Institution
    Texas Instrum., Dallas, TX, USA
  • fYear
    2011
  • fDate
    20-24 Feb. 2011
  • Firstpage
    132
  • Lastpage
    134
  • Abstract
    A multimedia applications processor is fabricated using a 28nm low-power process technology for ultra-low-power applications. Based on a 4-issue, 32 register version of the TMS320C64X+ VLIW DSP, this System on Chip (SoC) includes 32kB L1 and 128kB L2 caches, and I2S, SPI, UART, MultiMediaCard, and external memory interfaces (Fig. 7.5.1). The design incorporates over 600k instances of custom low-voltage logic cells and 43 instances (1.6 Mb) of 6T SRAM. Utilizing ultra-low-voltage (ULV) optimized standard-cell libraries and 6T SRAM macros, and demonstrating a new statistical static timing analysis (SSTA) methodology, the SoC scales as designed from high performance at 1.0V down to ultra-low power at 0.6V.
  • Keywords
    SRAM chips; cache storage; computer interfaces; digital signal processing chips; integrated logic circuits; logic design; low-power electronics; mobile radio; multimedia systems; multiprocessing systems; statistical analysis; system-on-chip; I2S; L2 caches; SPI; SRAM macros; SSTA methodology; SoC scales; TMS320C64X+; UART; VLIW DSP; custom low-voltage logic cells; external memory interfaces; low-power DSP; low-power process technology; mobile applications; multimedia applications processor; multimediacard; size 28 nm; statistical static timing analysis methodology; system on chip; ultra-low-power applications; ultra-low-voltage optimized standard-cell library; voltage 0.6 V; Clocks; Delay; Digital signal processing; Libraries; Random access memory; System-on-a-chip;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2011 IEEE International
  • Conference_Location
    San Francisco, CA
  • ISSN
    0193-6530
  • Print_ISBN
    978-1-61284-303-2
  • Type

    conf

  • DOI
    10.1109/ISSCC.2011.5746251
  • Filename
    5746251