Title :
A full-duplex 10GBase-T transmitter hybrid with SFDR >65dBc Over 1 to 400MHz in 40nm CMOS
Author :
Chandra, Gaurav ; Malkin, Moshe
Author_Institution :
Teranetics, San Jose, CA, USA
Abstract :
A transmitter and echo cancellation hybrid for IEEE 802.3an 10GBase-T Ethernet standard is presented, that utilizes DSP techniques to enhance the linear cancellation, and analog non-linearity cancellation to eliminate the need of a high linearity transmitter. Implemented in 40nm CMOS, the transmitter has a residual distortion <; -65dBc and residual linear echo <; -30dBc over a bandwidth of 1 to 400MHz. The transmitter, including the echo-cancellation circuitry and on-chip DSP engine, consumes 250mW power and occupies 0.9mm2.
Keywords :
CMOS integrated circuits; digital signal processing chips; echo suppression; local area networks; radio transmitters; CMOS; IEEE 802.3an 10GBase-T Ethernet standard; SFDR; analog nonlinearity cancellation; bandwidth 1 MHz to 400 MHz; echo-cancellation circuitry; full-duplex 10GBase-T transmitter hybrid; linear cancellation; on-chip DSP engine; power 250 mW; residual distortion; residual linear echo; size 40 nm; Digital signal processing; Echo cancellers; Engines; Ethernet networks; Layout; Receivers; Transmitters;
Conference_Titel :
Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2011 IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
978-1-61284-303-2
DOI :
10.1109/ISSCC.2011.5746256
