Title :
The microarchitecture of a low power clustered register file for parallel processors
Author :
Hua, Chung-Hsien ; Hwang, Wei
Keywords :
CMOS technology; Capacitance; Delay estimation; Energy consumption; Microarchitecture; Power dissipation; Propagation delay; Registers; Silicon; Wire;
Conference_Titel :
Circuits and Systems, 2004. Proceedings. The 2004 IEEE Asia-Pacific Conference on
Print_ISBN :
0-7803-8660-4
DOI :
10.1109/APCCAS.2004.1413058