Title :
A 7MB/s 64Gb 3-bit/cell DDR NAND flash memory in 20nm-node technology
Author :
Ki-Tae Park ; Ohsuk Kwon ; Sangyong Yoon ; Myung-Hoon Choi ; In-Mo Kim ; Bo-Geun Kim ; Min-Seok Kim ; Yoon-Hee Choi ; Seung-Hwan Shin ; Youngson Song ; Joo-Yong Park ; Jae-eun Lee ; Chang-Gyu Eun ; Ho-Chul Lee ; Hyeong-Jun Kim ; Jun-Hee Lee ; Jong-Young K
Author_Institution :
Samsung Electron., Hwasung, South Korea
Abstract :
Recently, the demand for 3b/cell NAND flash has been increasing due to a strong market shift from 2b/cell to 3b/cell in NAND flash applications, such as USB disk drives, memory cards, MP3 players and digital still cameras that require cost effective flash memory. To further expand the 3b/cell market, high write and read performances are essential. Moreover, the device reliability requirements for these applications is a challenge due to continuing NAND scaling to sub-30nm pitches that increases cell-to-cell interference and disturbance. We present a high reliability 64Gb 3b/cell NAND flash with 7MB/s write rate and 200Mb/s asynchronous DDR interface in a 20m-node technology that helps to meet the expanding market demand and application requirement.
Keywords :
NAND circuits; flash memories; semiconductor device reliability; DDR NAND flash memory; MP3 player; USB disk drive; asynchronous DDR interface; bit rate 200 Mbit/s; byte rate 7 MByte/s; cell-to-cell interference; digital still camera; memory card; size 20 nm; storage capacity 64 Gbit; Computer architecture; Decoding; Flash memory; Latches; Microprocessors; Reliability; Tunneling;
Conference_Titel :
Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2011 IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
978-1-61284-303-2
DOI :
10.1109/ISSCC.2011.5746287