Comparative Analysis of Ultra-Low Voltage Flip-Flops for Energy Efficiency

The wide use of voltage scaling along with pipelining makes flip-flops particularly important at ultra-low voltages. In this paper, the impact of voltage scaling on the performance of flip-flops is analyzed. Four representative flip-flops are compared at ultra-low voltages, for delay, energy and energy-delay-product (EDP). With decreasing supply voltage, a pulse-triggered flip-flop and a sense-amplifier based flip-flop produce smaller increase in setup time, compared with a master-slaver flip-flop. For energy efficient operation at ultra-low voltages, a transmission-gate based master-slave flip-flop achieves the smallest EDP at low switching activities, while a pulse-triggered flip-flop becomes more energy efficient at high switching activities.