• DocumentCode
    2895267
  • Title

    Low-latency high-bandwidth HW/SW communication in a virtual memory environment

  • Author

    Lange, Holger ; Koch, Andreas

  • Author_Institution
    Embedded Syst. & Applic. Group (ESA), Tech. Univ. Darmstadt, Darmstadt
  • fYear
    2008
  • fDate
    8-10 Sept. 2008
  • Firstpage
    281
  • Lastpage
    286
  • Abstract
    Adaptive computers combine conventional software programmable processors with reconfigurable compute units. We present techniques that allow the high-performance realization of demand-paged, virtually addressed main memory shared between both of these processing elements. Furthermore, we have achieved low-latency communication between software running on the CPU and the reconfigurable compute unit, allowing even fine-grained hardware/software partitioning. A system-level evaluation quantifies the advantages of our approach.
  • Keywords
    field programmable gate arrays; logic partitioning; reconfigurable architectures; virtual storage; adaptive computers; demand-paged virtually addressed memory environment; fine-grained hardware partitioning; fine-grained software partitioning; low-latency high-bandwidth HW/SW communication; reconfigurable compute unit; software programmable processors; system-level evaluation; Acceleration; Application software; Central Processing Unit; Computer architecture; Delay; Embedded computing; Hardware; Kernel; Operating systems; Registers;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Field Programmable Logic and Applications, 2008. FPL 2008. International Conference on
  • Conference_Location
    Heidelberg
  • Print_ISBN
    978-1-4244-1960-9
  • Electronic_ISBN
    978-1-4244-1961-6
  • Type

    conf

  • DOI
    10.1109/FPL.2008.4629945
  • Filename
    4629945