DocumentCode
2895887
Title
Parallel instance discrete-event simulation using a vector uniprocessor
Author
Ohi, James F. ; Preiss, Bruno R.
Author_Institution
Dept. of Electr. & Comput. Eng., Waterloo Univ., Ont., Canada
fYear
1991
fDate
8-11 Dec 1991
Firstpage
593
Lastpage
601
Abstract
The authors examine the possibility of running simulations in parallel on a vector processor. In such a system each instance of execution runs identical code but with a different input data set. The main problem addressed is the choice of block selection policy, that is, the choice of which indivisible block of code to execute next. The authors investigate four block selection policies by simulating the execution of such a system. A stochastic flow-graph representation was chosen to model the execution of a simulation. A two-level block selection policy was found to have the best potential speedup of the four block selection policies. The speedup levels achieved were not large, and decreased when there are a large number of unique event types (and therefore handlers) in the simulated system
Keywords
discrete event simulation; parallel processing; stochastic processes; block selection policies; block selection policy; parallel instance discrete event simulation; simulated system; stochastic flow-graph representation; vector uniprocessor; Councils; Discrete event simulation; Parallel algorithms; Process control; Stochastic processes; Stochastic systems; Vector processors;
fLanguage
English
Publisher
ieee
Conference_Titel
Simulation Conference, 1991. Proceedings., Winter
Conference_Location
Phoenix, AZ
Print_ISBN
0-7803-0181-1
Type
conf
DOI
10.1109/WSC.1991.185663
Filename
185663
Link To Document