Title :
A new parallel processing paradigm using a reconfigurable computing system
Author :
Shimoo, Kosei ; Yamawaki, Akin ; Iwane, Masahiko
Author_Institution :
Dept. of Electr. Eng., Kyushu Inst. of Technol., Kitakyushu, Japan
Abstract :
This work proposes a new parallel processing paradigm using a reconfigurable computing system. In proposed system, an application program is parallelized statically into threads. They are translated to hardware threads, and then, they are executed by a reconfigurable computing system directly. The hardware threads cooperate with a high-speed synchronization using tags on the reconfigurable device. To evaluate the effect of a parallel processing and the performance impact of synchronization, we have performed the preliminary experiments using some application programs on a real machine. The result shows that extracting parallelisms improves the performance of 1.37 times at average. The low-overhead communication and synchronization on the reconfigurable device can achieve good performance improvement on a parallel processing.
Keywords :
fault tolerant computing; parallel processing; reconfigurable architectures; synchronisation; application programs; hardware threads; high-speed synchronization; low-overhead communication; parallel processing paradigm; parallelisms; performance impact; reconfigurable computing system; statically parallelized application program threads; Circuits; Concurrent computing; Embedded computing; Hardware; Monitoring; Paper technology; Parallel processing; Performance evaluation; Registers; Yarn;
Conference_Titel :
Communications and Information Technology, 2004. ISCIT 2004. IEEE International Symposium on
Print_ISBN :
0-7803-8593-4
DOI :
10.1109/ISCIT.2004.1413826