DocumentCode :
2896091
Title :
New dimensions for multiprocessor architectures: On demand heterogeneity, infrastructure and performance through reconfigurability — the RAMPSoC approach
Author :
Gohringer, D. ; Hubner, M. ; Perschke, T. ; Becker, J.
Author_Institution :
FGAN-FOM, Ettlingen
fYear :
2008
fDate :
8-10 Sept. 2008
Firstpage :
495
Lastpage :
498
Abstract :
Multiprocessor hardware architectures enable to distribute tasks of an application to several microprocessors, in order to exploit parallelism for accelerating the performance of computation. Especially for the application domain of image data processing, where computation performance is a crucial factor to keep the real-time requirements, this approach is a promising solution for the assembly of high sophisticated algorithms e.g. for object tracking. Changing requirements and the necessary implementation of the tasks in terms of modified algorithms, precision and communication needs to be handled by software and hardware adaptation in state of the art architectures. Field programmable gate arrays (FPGAs) enable to exploit the adaptation of hardware cores and the software running on embedded microprocessor cores on an integrated multiprocessor system.
Keywords :
field programmable gate arrays; microprocessor chips; reconfigurable architectures; system-on-chip; FPGA; RAMPSoC approach; field programmable gate arrays; hardware adaptation; image data processing; multiprocessor hardware architectures; object tracking; Computer architecture; Field programmable gate arrays; Hardware; Image processing; Parallel processing; Software; Switches; Image Processing; MPSoC; Reconfigurable Hardware;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Field Programmable Logic and Applications, 2008. FPL 2008. International Conference on
Conference_Location :
Heidelberg
Print_ISBN :
978-1-4244-1960-9
Type :
conf
DOI :
10.1109/FPL.2008.4629992
Filename :
4629992
Link To Document :
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