Power/Area Trade-Offs in Low-Power/Low-Area Unary-R-2R CMOS Digital-to-Analog Converters

Performance trade offs of unary-R-2R and unary-binary digital-to-analog converters are presented. It is shown that for a given resolution and sampling rate, the active area of the unary-binary converter grows as the operating current of the unit cells approaches the weak inversion region. At very low-currents, the unary-R-2R architecture has a large area advantage over the unary-binary architecture for medium resolution, medium-speed applications.