Title :
A 10Gb/s half-UI IIR-tap transmitter in 40nm CMOS
Author :
Cirit, Halil ; Loinaz, Marc J.
Author_Institution :
Netlogic Microsyst., Santa Clara, CA, USA
Abstract :
In this work the combination of half-UI post-cursor FIR tap filtering and post-cursor IIR tap filtering is proposed as a solution for achieving simultaneous TWDPc and DDJ optimization for SFI.
Keywords :
CMOS integrated circuits; IIR filters; CMOS; FIR tap filtering; half-UI IIR-tap transmitter; Backplanes; Driver circuits; Finite impulse response filter; Optical transmitters; Shift registers;
Conference_Titel :
Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2011 IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
978-1-61284-303-2
DOI :
10.1109/ISSCC.2011.5746392
