DocumentCode :
2896372
Title :
A new methodology for debugging and validation of soft cores
Author :
Hochberger, Christian ; Weiß, Alexander
Author_Institution :
Dept. for Embedded Syst., Dresden Univ. of Technol., Dresden
fYear :
2008
fDate :
8-10 Sept. 2008
Firstpage :
551
Lastpage :
554
Abstract :
The amount of time and resources that have to be spent on debugging of embedded cores continuously increases. Approaches valid 10 years ago can no longer be used due to the variety and complexity of peripheral components of SoC solutions that even might consist of multiple heterogeneous cores. In this contribution we show how debugging and tracing of embedded processor cores can be enhanced by use of an externally synchronized cpu core.
Keywords :
embedded systems; microprocessor chips; program debugging; program verification; system-on-chip; SoC; debugging; embedded processor cores; multiple heterogeneous cores; soft cores; Bandwidth; Costs; Debugging; Embedded software; Embedded system; Field programmable gate arrays; Ice; Microcontrollers; Network-on-a-chip; Registers;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Field Programmable Logic and Applications, 2008. FPL 2008. International Conference on
Conference_Location :
Heidelberg
Print_ISBN :
978-1-4244-1960-9
Electronic_ISBN :
978-1-4244-1961-6
Type :
conf
DOI :
10.1109/FPL.2008.4630006
Filename :
4630006
Link To Document :
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