Title :
Self-recofigurable embedded systems on Spartan-3
Author :
Cantó, Enrique ; Fons, Francesc ; Lopez, Miguel
Author_Institution :
Dept. of Electron., Electr. & Autom., Univ. Rovira i Virgili, Tarragona
Abstract :
This paper describes the architecture and design flow of a self-reconfigurable embedded system, mapped on a Spartan-3 low-cost FPGA, where a fixed area is reserved to accommodate a reconfigurable coprocessor. Spartan-3 low-cost family lacks of the ICAP (Internal Configuration Access Port) and design tools for self-reconfiguration. The paper also deals with other issues, such as OPB isolation, bit-stream retrieve from external SRAM, bit-stream processing, and clock routing.
Keywords :
coprocessors; embedded systems; field programmable gate arrays; network routing; reconfigurable architectures; SRAM external memory controller; Spartan-3; bit-stream processing; clock routing; field programmable gate arrays; internal configuration access port; reconfigurable coprocessor; self-recofigurable embedded systems; Acceleration; Circuits; Coprocessors; Embedded system; Field programmable gate arrays; Hardware; Microprocessors; Pins; Random access memory; Routing;
Conference_Titel :
Field Programmable Logic and Applications, 2008. FPL 2008. International Conference on
Conference_Location :
Heidelberg
Print_ISBN :
978-1-4244-1960-9
Electronic_ISBN :
978-1-4244-1961-6
DOI :
10.1109/FPL.2008.4630011
