DocumentCode
2896507
Title
A 250mV 7.5μW 61dB SNDR CMOS SC ΔΣ modulator using a near-threshold-voltage-biased CMOS inverter technique
Author
Michel, Fridolin ; Steyaert, Michiel
Author_Institution
KU Leuven, Leuven, Belgium
fYear
2011
fDate
20-24 Feb. 2011
Firstpage
476
Lastpage
478
Abstract
One of the most continuous trends in solid-state circuits is the decrease in power supply as a direct consequence of technology scaling. The fact that Vt does not scale linearly with supply voltage has encouraged several low-voltage design techniques recently. The received voltage level in a wireless power transfer system decays rapidly with distance and also medical portable systems are calling for low-voltage circuitries.
Keywords
CMOS integrated circuits; delta-sigma modulation; invertors; low-power electronics; CMOS SC ΔΣ modulator; SNDR; low-voltage design; near-threshold-voltage-biased CMOS inverter technique; power 7.5 muW; solid-state circuits; voltage 250 mV; wireless power transfer system; CMOS integrated circuits; Clocks; Converters; Inverters; Logic gates; Power supplies; Solid state circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2011 IEEE International
Conference_Location
San Francisco, CA
ISSN
0193-6530
Print_ISBN
978-1-61284-303-2
Type
conf
DOI
10.1109/ISSCC.2011.5746404
Filename
5746404
Link To Document