DocumentCode :
2896569
Title :
A 108dB-DR 120dB-THD and 0.5Vrms output audio DAC with inter-symbol-interference-shaping algorithm in 45nm CMOS
Author :
Risbo, Lars ; Hezar, Rahmi ; Kelleci, Burak ; Kiper, Halil ; Fares, Mounir
Author_Institution :
Texas Instrum., Copenhagen, Denmark
fYear :
2011
fDate :
20-24 Feb. 2011
Firstpage :
484
Lastpage :
485
Abstract :
We propose a new digital algorithm that can shape element mismatch and ISI errors simultaneously. This method fully shapes ISI and the mismatch errors outside audio band and eliminates the need for layout critical and non-automat ed analog design methods that often require multiple design iterations and are hard to migrate over processes. This is enabled by using digital processing circuits that are simple and predictable with modern EDA tools and come at low cost in power and area using deep-submicron CMOS. In addition, the proposed solution works at regular DSM clock rate and does not require another PLL and clock management circuit.
Keywords :
CMOS integrated circuits; digital-analogue conversion; integrated circuit design; intersymbol interference; CMOS; DAC; DSM clock rate; EDA tools; ISI errors; PLL; clock management circuit; digital algorithm; digital processing circuits; element mismatch; intersymbol-interference-shaping algorithm; multiple design iterations; nonautomated analog design; Clocks; Converters; Frequency modulation; Noise; Sensitivity; Switches;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2011 IEEE International
Conference_Location :
San Francisco, CA
ISSN :
0193-6530
Print_ISBN :
978-1-61284-303-2
Type :
conf
DOI :
10.1109/ISSCC.2011.5746408
Filename :
5746408
Link To Document :
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