• DocumentCode
    2896591
  • Title

    A high performance microprocessor with DSP extensions optimized for the Virtex-4 FPGA

  • Author

    Ehliar, Andreas ; Karlström, Per ; Liu, Dake

  • Author_Institution
    Dept. of Electr. Eng., Linkoping Univ., Linkoping
  • fYear
    2008
  • fDate
    8-10 Sept. 2008
  • Firstpage
    599
  • Lastpage
    602
  • Abstract
    As the use of FPGAs increases, the importance of highly optimized processors for FPGAs will increase. In this paper we present the microarchitecture of a soft microprocessor core optimized for the Virtex-4 architecture. The core can operate at 357 MHz, which is significantly faster than Xilinxpsila Microblaze architecture on the same FPGA. At this frequency it is necessary to keep the logic complexity down and this paper shows how this can be done while retaining sufficient functionality for a high performance processor.
  • Keywords
    digital signal processing chips; embedded systems; field programmable gate arrays; hardware-software codesign; logic design; DSP extension; Virtex-4 FPGA; high performance microprocessor; soft microprocessor core microarchitecture; Arithmetic; Digital signal processing; Field programmable gate arrays; Hardware; Microarchitecture; Microprocessors; Pipelines; Reduced instruction set computing; Registers; Videoconference;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Field Programmable Logic and Applications, 2008. FPL 2008. International Conference on
  • Conference_Location
    Heidelberg
  • Print_ISBN
    978-1-4244-1960-9
  • Electronic_ISBN
    978-1-4244-1961-6
  • Type

    conf

  • DOI
    10.1109/FPL.2008.4630018
  • Filename
    4630018