Title :
Parallel deblocking filter for H.264 AVC/SVC
Author :
Vijay, S. ; Chakrabarti, C. ; Karam, L.J.
Author_Institution :
Sch. of Electr., Comput. & Energy Eng., Arizona State Univ., Tempe, AZ, USA
Abstract :
This paper presents a parallel and scalable solution for adaptive deblocking filtering in H.264/AVC. While traditionally in deblocking filtering, the edges in a macroblock are processed in a sequential order, this paper demonstrates how algorithm modifications can be used to enable processing multiple consecutive edges at the same time. The proposed method increases the throughput in proportion to the number of edges that are being processed simultaneously without affecting the PSNR and bit-rate. Details of the method to process 2 consecutive edges in parallel as well as extensions to process 4 and 8 consecutive edges, are provided. A dedicated hardware architecture to process 2 edges is presented along with synthesis results. The architecture achieves a 2× increase in throughput at the expense of a 2.2× increase in area and a 1.23× increase in power.
Keywords :
filtering theory; parallel architectures; video coding; H.264 AVC-SVC; adaptive deblocking filtering; hardware architecture; parallel architecture; parallel deblocking filter; Computer architecture; Encoding; Hardware; Logic gates; Parallel processing; Pixel; Throughput; deblocking filter; parallel architecture;
Conference_Titel :
Signal Processing Systems (SIPS), 2010 IEEE Workshop on
Conference_Location :
San Francisco, CA
Print_ISBN :
978-1-4244-8932-9
Electronic_ISBN :
1520-6130
DOI :
10.1109/SIPS.2010.5624773