A 1.2V 12.8GB/s 2Gb mobile Wide-I/O DRAM with 4×128 I/Os using TSV-based stacking

Author

Kim, Jung-Sik ; Oh, Chi Sung ; Lee, Hocheol ; Lee, Donghyuk ; Hwang, Hyong-Ryol ; Hwang, Sooman ; Na, Byongwook ; Moon, Joungwook ; Kim, Jin-Guk ; Park, Hanna ; Ryu, Jang-Woo ; Park, Kiwon ; Kang, Sang-Kyu ; Kim, So-Young ; Kim, Hoyoung ; Bang, Jong-Min ;

Author_Institution

Samsung Electron., Hwasung, South Korea

fYear

2011

fDate

20-24 Feb. 2011

Firstpage

496

Lastpage

498

Abstract

Mobile DRAM is widely employed in portable electronic devices due to its fea ture of low power consumption. Recently, as the market trend renders integra tion of various features in one chip, mobile DRAM is required to have not only low power consumption but also high capacity and high speed. To attain these goals in mobile DRAM, we designed a 1Gb single data rate (SDR) Wide-I/O mobile SDRAM with 4 channels and 512 DQ pins, featuring 12.8GB/S data band width.

Keywords

DRAM chips; low-power electronics; three-dimensional integrated circuits; TSV-based stacking; byte rate 12.8 GByte/s; low power consumption; mobile wide-I/O DRAM; portable electronic devices; single data rate; storage capacity 1 Gbit; storage capacity 2 Gbit; voltage 1.2 V; wide-I/O mobile SDRAM; Arrays; Clocks; Mobile communication; Pins; Random access memory; Registers; Timing;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2011 IEEE International

Conference_Location

San Francisco, CA

ISSN

0193-6530

Print_ISBN

978-1-61284-303-2

Type

conf

DOI

10.1109/ISSCC.2011.5746413

Filename

5746413